1. Field of the Invention
The present invention relates to an electronic module and method of making which employs a chip carrier with metal oxide solder dams on top of circuit lines, the circuit lines having end portions which are located within a soldermask window and are attached to a chip by solder joints.
2. Description of the Related Art
An electronic module includes a plurality of integrated circuit semiconductor devices, hereinafter referred to as chips, which are electrically connected at multiple sites to circuit lines on a carrier substrate. The carrier substrate is an epoxy fiberglass board which has circuit lines between the various chips and has vias which connect the circuit lines to other circuit lines and/or components on an opposite side of the board or to components laminated within the board. One flat side of a chip has multiple C4 solder balls or solder bumps which are soldered to electrodes within the chip. C4 ("Controlled Collapse Chip Connection") signifies that reflow of solder to form a solder joint can be controlled to produce a desired standoff of the chip from the carrier substrate. In some cases the solder bump on the chip may be solder having a high melting point ("high melt solder") and the solder on the circuit line may be solder with a low melting point ("low melt solder"). With this arrangement the solder ball acts as a stud to produce a standoff of the chip from the substrate. The area around each solder joint is encapsulated to protect the joint from moisture and chemicals. If all the solder joints are properly encapsulated the electronic module will have a long life. Unfortunately many prior art methods of production do not properly fill the solder joints with an encapsulant.
In prior art methods of producing electronic modules an initial step is to pattern the carrier substrate with resist and then plate the circuit lines. These circuit lines are plated on top of a copper foil layer which rests on top of the carrier substrate. Solder is then typically deposited as an etch resist on the circuit lines, the first resist is stripped and the copper foil about the circuit lines is removed with an etchant and solder is removed. A soldermask is then formed with an opening for each solder joint. Each circuit line extends below the soldermask and is covered thereby except for a line segment which is exposed through a soldermask window. Because of the sizes of the soldermask openings it is very difficult to properly register the prior art soldermask openings with the numerous solder joint locations. Solder is then deposited on the line segments by pattern plating or panel plating. The chip is then laid on the carrier substrate with its solder bumps in registration with the solder bumps on the board. Heat is then applied to reflow the solder and form solder joints interconnecting the chip electrodes to the circuit lines. This method of connection is known in the art as "flip chip attach" (FCA). Solder reflow can occur on either or both of the chip and line segments.
One of the last steps is to dispense an underfill encapsulant to protect the solder joints. The soldermask stays in place and forms a part of the final electronic module. In this step the encapsulant has to travel in a confined space between the chip and the carrier substrate to the many solder joints, some of which may be remotely located below a center portion of a chip. Each solder joint is surrounded by edges of a respective soldermask window. These edges impede the flow of the encapsulant throughout the soldermask window causing air voids. Air voids expand and contract due to temperature changes which can exert forces on the solder joints. These forces can separate chip electrodes from the circuit lines. Unfortunately, the step of encapsulating the solder joints is essentially the last step in the production of the electronic module. This means that production losses due to voids in the encapsulant cost more than losses due to other causes earlier in the cycle of production. There is a strong felt need for a method of making electronic modules which are free of voids and which is easier to implement.